Fairchild Manuals (Industrial)

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The MM74C154 is a 4-line to 16-line decoder/demultiplexer that is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors.

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The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1-of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical “1” state and the output of MM82C19 in the high-impedance state. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.

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This document introduces a series of logic gate products, including Quad 2-Input NAND Gate, Quad 2-Input NOR Gate, Hex Inverter, Triple 3-Input NAND Gate, and Dual 4-Input NAND Gate. These products use complementary MOS (CMOS) technology and have wide power supply operating range, low power consumption, high noise immunity, and symmetric controlled rise and fall times. The 54C-74C logic family is functionally and pin compatible with the 54-74 series devices, minimizing design time for designers familiar with the standard 54-74 logic family. All inputs are protected from damage due to static discharge by diode clamps.

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The MM74C08 is a quad 2-input AND gate that uses complementary MOS (CMOS) transistors to achieve a wide power supply operating range, low power consumption, and high noise margin. These gates provide the basic functions required in digital integrated circuit systems. The N- and P-channel enhancement mode transistors provide a symmetrical circuit with output swing essentially equal to the supply voltage. No DC power other than that caused by leakage current is consumed during static condition. All inputs are protected from damage due to static discharge by diode clamps to VCC and GND.

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This datasheet provides information about MM74C165's features, pin assignments, and package.

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74F161A and 74F163A are high-speed synchronous modulo-16 binary counters. They are synchronously pre- settable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multi-stage counters. The 74F161A has an asynchronous Master- Reset input that overrides all other inputs and forces the outputs LOW. The 74F163A has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock. The 74F161A and 74F163A are high- speed versions of the 74F161 and 74F163.

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The 74F160A and 74F162A are high-speed synchronous decade counters operating in the BCD (8421) sequence. They are synchronously presettable for applications in programmable dividers. There are two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The F160A has an asynchronous Master Reset input that overrides all other inputs and forces the outputs LOW. The F162A has a Synchronous Reset input that overrides counting and parallel loading and allows all outputs to be simultaneously reset on the rising edge of the clock. The F160A and F162A are high speed versions of the F160 and F162.

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The 74F157A is a high-speed quad 2-input multiplexer. It can select four bits of data from two sources using the common Select and Enable inputs. The four outputs present the selected data in non-inverted form. The 74F157A can also be used to generate any four of the 16 different functions to two variables. The device is available in Tape and Reel packaging.

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The 74F153 is a high-speed dual 4-input multiplexer produced by Fairchild Semiconductor Corporation. It can select two data lines from four sources and store the outputs independently.

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The document describes the features and functions of the high-speed 8-input digital multiplexer of the F151A model. The multiplexer can select one data line from up to eight sources and can be used as a universal function generator to generate any logic function of four variables. The product provides both assertion and negation outputs.

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The 74F148 is an 8-line to 3-line priority encoder that provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It can be easily expanded via input and output enables to provide priority encoding over many bits.

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The F139 is a high-speed, dual 1-of-4 decoder/demultiplexer. It has two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW outputs. Each decoder has an active LOW Enable input which can be used as a data input for a 4-out- put demultiplexer. Each half of the F139 can be used as a function generator providing all four minterms of two vari- ables.

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The TLF9479 is a high-speed dual 1-of-4 decoder-demultiplexer with two independent decoders, each accepting two inputs and providing four mutually exclusive active LOW outputs. Each decoder has an active LOW Enable input which can be used as a data input for a 4-output demultiplexer.

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The 74F138 54F138 1-of-8 Decoder/Demultiplexer is a high-speed 1-of-8 decoder/demultiplexer produced by National Semiconductor Corporation. This device is ideally suited for high-speed bipolar memory chip select address decoding. Multiple input enables allow parallel expansion to a 1-of-24 decoder using just three 'F138 devices or a 1-of-32 decoder using four 'F138 devices and one inverter.

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The 74F138 1-of-8 decoder/demultiplexer is a high-speed product released by Fairchild Semiconductor Corporation. It has decoding/demultiplexing function, multiple input enable for easy expansion and mutually exclusive outputs.

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54F/74F132 Quad 2-Input NAND Schmitt Trigger

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The 74F132 is an integrated circuit manufactured by Fairchild Semiconductor Corporation that has four 2-input NAND gates. It can accept standard TTL input signals and provide standard TTL output levels. It is faster than conventional NAND gates and has a greater noise margin. Each circuit contains a 2-input Schmitt trigger, followed by level shifting circuitry and a standard FAST® output structure. The Schmitt trigger uses positive feedback to effectively speed up slow input transitions and provide different input threshold voltages for positive and negative transitions. The hysteresis between the positive-going and negative-going input threshold (typically 800 mV) is determined by resistor ratios and is essentially insensitive to temperature and supply voltage variations.

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The 74F125 is a quad buffer with three-state function. It features high impedance base inputs for reduced loading.

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